FastVideo/FastVideo-FastH3-Trim-8-Step-MLX-INT6

FastH3 Trim 8-step MLX INT6

Converted from FastVideo/FastVideo-FastH3-Trim-8-Step, revision 9edcb6511d5ff8dd1579e8eec8afee77e098b8d8, from the released BF16 transformer. The transformer uses MLX affine INT6 weights, retained VSA gates, and a cached rank-16 AdaLN ladder. The native NVFP4 text encoder is stored in MLX layout without requantization. The 26-layer lightweight video VAE and audio VAE are included. fastvideo_inference.json supplies the eight-forward schedule.

Use the Spark/Mac code in hao-ai-lab/FastVideo#1920. After downloading this snapshot to MODEL_ROOT, run:

from fastvideo.mlx_runtime.minimax_h3_pipeline import MiniMaxH3MLXPipeline
from pathlib import Path
root = Path("MODEL_ROOT")
pipeline = MiniMaxH3MLXPipeline(
    model_root=root, mlx_dit_checkpoint=root / "transformer",
    conditioner_mode="nvfp4", vae_dtype="fp16", resident=False,
    metal_wired_limit_gib=27,
)
try:
    pipeline.generate("A red fox in snow.", output_path="clip.mp4",
                      width=832, height=480, num_frames=124, seed=1234,
                      num_steps=8, vsa=True, vsa_sparsity=0.8,
                      vsa_tile_size=64, vsa_impl="reference")
finally:
    pipeline.close()

Use reference attention for release generation. The optional SIMD Metal backend has a known partial-tile correctness issue. Phased placement keeps one heavy component loaded at a time on the 36 GiB Mac. Transformer storage is 15,355,458,984 bytes including its manifest, before the encoder and VAEs.

This is an experimental pruned model. Source-model licensing and acceptable-use terms still apply. See the source repository and its parent model licenses.